1. Field of the Invention
The present invention relates to a semiconductor device which has circuits constituted, over a substrate having an insulating surface, of thin film transistors (hereinafter referred to as TFTs) and its fabricating process. Particularly, the invention relates to an electro-optical device (also called electronic device) represented by a liquid crystal display device or an EL (electroluminescence) display device which is constituted in such a manner that a pixel portion (pixel circuit) and driving circuits (control circuits) disposed in the periphery of the pixel portion are provided on one and the same substrate and an electro-optical appliance (also called an electronic apparatus) presented by an EL (electroluminescence) display device, and an electric appliance (also called electronic apparatus) on which an electro-optical device is mounted.
In this specification, by semiconductor devices, devices in general which function by utilizing the semiconductor characteristics are referred to, and the above-mentioned electro-optical device and an electric appliance on which the electro-optical device is mounted are also covered by the semiconductor devices.
2. Description of the Related Art
The development of semiconductor devices which each comprises a large-area integrated circuit formed of TFTs on a substrate having an insulating surface is being advanced. Known as representative examples of these semiconductor devices are an active matrix type liquid crystal display device, an EL display device, and a contact type image sensor. Particularly, TFTs (hereinafter referred to as polycrystalline silicon TFTs) each constituted in such a manner that a crystalline silicon film (typically, a polycrystalline silicon film) is rendered into an active layer have a high field effect mobility and thus can form various functional circuits.
For example, in an active matrix type liquid crystal display device, a pixel portion which effects image display by every function block and driving circuits such as shift registers, level shifters, buffers and sampling circuits which are based on CMOS circuits are formed on one substrate. Further, in a contact type image sensor, driving circuits such as sample and hold circuits, shift registers, multiplexed circuits for controlling the pixel portion are formed by the use of TFTs.
Since these driving circuits (also known as peripheral driving circuits) do not always have the same operating condition, the characteristics required of the TFTs naturally differ not a little. In the pixel portion, pixel TFTs functioning as switch elements and auxiliary capacitance storage are provided, and a voltage is applied to the liquid crystal to drive it. Here, the liquid crystal needs to be driven by AC, and the system called frame inversion driving is adopted in many cases. Accordingly, for the characteristics required of the TFTs, it was necessary to keep the OFF-current value (the value of the drain current flowing when a TFT is in OFF-operation) sufficiently low.
Further, the buffer, to which a high driving voltage is applied, had to have its withstand voltage enhanced up to such a degree that the buffer would not be broken even if a high voltage was applied thereto. Further, in order to enhance the current driving ability, it was necessary to sufficiently secure the ON-current value (the value of the drain current flowing when the TFT is in ON-operation).
However, there is the problem that the OFF-current value of a polycrystalline silicon TFT is apt to become high. Further, in case of a polycrystalline silicon TFT, there is observed the deterioration phenomenon that its ON-current value falls as in case of a CMOS transistor used in an IC or the like. The main cause therefor lies in the injection of hot carriers; it is considered that the hot carriers generated by the high electric field in the vicinity of the drain cause the deterioration phenomenon.
As a TFT structure for lowering the OFF-current value, the lightly doped drain (LDD) structure is known. This structure is made in such a manner that, between the channel forming region and the source region or the drain region to which an impurity is added at a high concentration, an impurity region having a low concentration is provided. This low concentration impurity region is known as LDD region.
Further, as a structure for preventing the deterioration of the ON-current value due to the injection of hot carriers, there is known the so-called GOLD (Gate-drain Overlapped LDD) structure. In case of this structure, the LDD region is disposed so as to overlap the gate wiring through the gate insulating film, so that this structure is effective for preventing the injection of hot carriers in the vicinity of the drain to enhance the reliability. For example, Mutsuko Hatono, Hajime Akimoto and Takeshi Sakai: IEDM97 TECHNICAL DIGEST, pp. 523-526, 1997, discloses a GOLD structure by the side wall formed of silicon; and it is confirmed that, according to this structure, a very high reliability can be obtained as compared with the TFTs of other structures.
Further, in the pixel portion of an active matrix type liquid crystal display device, a TFT is disposed to each of several ten millions to several hundred millions of pixels, and these TFTs are each provided with a pixel electrode. At the side of the substrate opposed to the pixel electrode through the liquid crystal, an opposite electrode is provided, thus forming a kind of capacitor with the liquid crystal as a dielectric. Then the voltage applied to each of the pixels is controlled by the switching function of the TFT to thereby control the charges to this capacitor, whereby the liquid crystal is driven, and the quantity of transmitted light is controlled, thus displaying an image.
However, the stored capacitance of this capacitor is gradually decreased due to the leakage current caused for causes pertaining to the OFF-current etc., which in turn becomes the cause for varying the quantity of transmitted light to lower the contrast of the image display. Thus, according to the known technique, a capacitor wiring is provided to form in parallel a capacitor (capacitance storage) other than the capacitor constituted with the liquid crystal as its dielectric, whereby the capacitance lost by the capacitor having the liquid crystal as its dielectric was compensated for.
However, the characteristics required of the pixel TFTs in the pixel portion and the characteristics required of the TFTs (hereinafter referred to as driving TFTs) in the driving circuits such as the shift registers and the buffers are not necessarily identical with each other. For example, in case of a pixel TFT, a large reverse bias (minus, in case of an n-channel type TFT) voltage is applied to the gate wiring, but a driving TFT is never operated with a reverse bias voltage applied thereto. Further, the operating speed of the former TFT can be {fraction (1/100)} or lower of the operating speed of the latter TFT.
Further, the GOLD structure has a high effect for preventing the deterioration of the ON-current value, indeed, but, on the other hand, has the defect that the OFF-current value becomes large as compared with the ordinary LDD structure. Accordingly, it could not be considered that the GOLD structure was a desirable structure particularly for the pixel TFT. It has been known that, conversely, the ordinary LDD structure has a high effect for suppressing the OFF-current value but is low in resistance to the injection of hot carriers.
As stated above, it was not always desirable to form all the TFTs with the same structure, in a semiconductor device including a plurality of integrated circuits as in case of an active matrix type liquid crystal display device.
Further, in case, as according to the known technique described above, a capacitance storage using a capacitor wiring is formed in the pixel portion so as to secure a sufficient capacitance, the aperture ratio (the ratio of the image-displayable area to the area of each pixel) had to be sacrificed. Particularly, in case of a small-sized, highly precise panel as is used in a projector type display device, the area per pixel is small, so that the reduction of the aperture ratio due to the capacitor wiring has become a problem.
The present invention relates to a technique for giving solutions to such problems, and it is the purpose of the invention to make the structures of the TFTs disposed in the respective circuits of a semiconductor device appropriate in accordance with the functions of the circuits to thereby enhance the operability and reliability of the semiconductor device. Further, it is the object of the invention to provide a fabrication process for realizing such a semiconductor device.
Another purpose of the invention is to provide a structure, for a semiconductor device having a pixel portion, which structure is constructed in such a manner that the area of the capacitance storage provided to each pixel is reduced to enhance the aperture ratio. Further, the invention provides a process of fabricating such a pixel portion.
In order to solve solutions to the problematic points mentioned above, a semiconductor device including a pixel portion and driving circuits on one and the same substrate according to the present invention is constituted in such a manner that;
the LDD regions of an n-channel type TFT forming each of the driving circuits are formed so as to partially or wholly overlap the gate wiring of the n-channel type TFT through the gate insulating film,
the LDD regions of a pixel TFT forming the pixel portion are formed so as not to overlap the gate wiring of the pixel TFT through the gate insulating film, and,
in the LDD regions of the n-channel type TFT forming the driving circuit, an n-type impurity element is contained at a concentration higher than that of the LDD regions of the pixel TFT.
Further, in addition to the structure mentioned above, the capacitance storage of the pixel portion may be formed of a light screening film provided on an organic resin film, an oxide of the light screening film and the pixel electrode. By so doing, the capacitance storage can be formed by the use of a very small area, so that the aperture ratio of the pixels can be enhanced.
Further, a more detailed structure according to the present invention lies in a semiconductor device including a pixel portion and driving circuits on one and the same substrate, which is characterized in that
the driving circuits include a first n-channel type TFT formed in such a manner that the whole of the LDD regions overlaps the gate wiring through the gate insulating film and a second n-channel type TFT formed in such a manner that portions of the LDD regions overlap the gate wiring through the gate insulating film, and,
in the pixel portion, there are included pixel TFTs each formed in such a manner that the LDD regions does not overlap the gate wiring through the gate insulating film. It is a matter of course that the capacitance storage in the pixel portion may be formed of a light screening film provided on an organic resin film, an oxide of the light screening film and the pixel electrode.
In the structure mentioned above, in the LDD regions of the n-channel type TFT forming a driving circuit, an element belonging to the group XV of the periodic table is to be contained at a concentration 2 to 10 times as high as that in the LDD regions of the pixel TFT. Further, it is also possible to form the LDD region of the first n-channel type TFT between the channel forming region and the drain region and to form the LDD regions of the second n-channel type TFT at both sides of the channel forming region.
Further, the constitution of the fabrication process according to the invention is as follows:
A process of fabricating a semiconductor device which includes a pixel portion and driving circuits on one and the same substrate, comprising
the first step of forming a semiconductor film containing a crystalline structure on the substrate,
the second step of subjecting said crystalline structure containing semiconductor film to a first optical annealing,
the third step of forming a protective film on the crystalline structure containing semiconductor film which has been subjected to said first optical annealing,
the fourth step of adding a p-type impurity element, through said protective film, to those regions of said crystalline structure containing semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed,
the fifth step of adding an n-type impurity element, through said protective film, to those regions of said crystalline structure containing semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed,
the sixth step of subjecting, to a second optical annealing, the crystalline structure containing semiconductor film which has undergone the fifth step,
the seventh step of patterning the crystalline structure containing semiconductor film which has undergone the sixth step to form active layers,
the eighth step of forming a gate insulating film on said active layers,
the ninth step of forming gate wirings on said gate insulating film,
the tenth step of adding an n-type impurity element to said active layers by the use of said gate wirings as a mask to form n-type impurity regions (c),
the eleventh step of etching said gate insulating film by the use of said gate wirings as a mask,
the twelfth step of adding an n-type impurity element to said n-channel type TFTs to form n-type impurity regions (a), and
the thirteenth step of adding a p-type impurity element to the active layer of said p-channel type TFT to form p-type impurity regions (a).
In this structure, the order of the first step to the 8th step may be suitably changed. In whatever order these steps are carried out, the basic functions of the finally formed TFTs remain unchanged, and thus, the change of the step order does not impair the effects of the invention.
Further, the order of the step of forming the p-type impurity regions (a), the step of forming the n-type impurity regions (a) and the step of forming the n-type impurity regions (b) can also be suitably changed. In this case, in whatever order the steps are carried out, the basic functions of the finally formed TFTs also remain unchanged; and thus, such change in the step order does not impair the effects of the invention.